资源列表
arm
- ARM内核的源代码描述，通过的各种仿真器的仿真，是学习嵌入式的好的列子，可以实现各种基本设计-ARM core
ask
- 基于Quartus9开发的一个关于ASK调制和解调的仿真，顶层用原理图，各个模块使用VHDL语言编写-Quartus9 developed a simulation on ASK modulation and demodulation based on the top floor with a schematic, each module using VHDL language
dds
- 用Verilog语言实现基于dds技术的余弦信号发生器，其输出位宽为16比特-Dds with the Verilog language technology based on the cosine signal generator, the output bit width is 16 bits
SPI_MASTER_SLAVE
- SPI Master and Slave for multiple master and multiple slave , working model , useful for interfacing ADC or DAC
wendang
- 这篇文档是基于vhdl语言的关于数字温度计的设计-This document is based on vhdl language design on the digital thermometer
xds100v2-lib
- xds100v2 lib xds100v2 库文件
mainboard_model
- FPGA与dSP的接口，包括testbench部分，以及实现-DSP interface with the FPGA, including part of testbench, as well as the realization of
rtl
- Verilog 蜂鸣器唱歌程序 同时可以显示音调大小-The Verilog buzzer singing program
cpu(FinalWithYS)
- verilog实现的八位CPU，包括乘法、除法以及多种寻址方式。代码中包括测试模块，可以直接在试验箱上运行。-verilog to achieve the eight CPU, including multiplication, division, as well as addressing a variety of ways. Code, including test modules, can be run directly in the chamber.
MPU_ACtiming
- Pattern generator for LCD controller.
ov7670
- OV7670驱动代码（源码） 只为驱动代码，输出为像素点信号，必须有相应的下层模块才能完全完成对摄像头的控制-OV7670 driver code (source) only for the driver code, the output pixel signal, there must be a corresponding lower module to fully complete camera control
LCD1602
- LCD1602液晶显示 整体显示关光标不闪烁-LCD1602 LCD The cursor does not blink the whole display off