资源列表
B(f)
- 自己编的VHDL的波形发生器 做信号的可以-BOXING
ASRP
- water marking and verilog vhdl code that related with ham and was very good file for u that understand about water marking
1
- 采用VHDL描述语言进行地步进电机控制系统的控制-VHDL descr iption language using the point of control into the motor control system
sy
- 七段显示译码器（功能：将思维二进制数译成七段输出信号，驱动数码管显示）
jushuqi
- 基于FPGA的计数器器源代码，赛林思比赛专用-Based on FPGA counter is the source code, and the "special LinSi game
An-electric-fan-automatically--
- 温控电风扇的自动开关控制器及fpga验证，含有源程序及fpga介绍应用-Automatic temperature control fan switch controller and the fpga verify, with source fpga Applications
xiyiji
- 洗衣机控制器，包括清洗、漂水、脱水等状态，vhdl-washing machine controller, including cleaning, bleaching water, dehydration state, vhdl
baweichufaqi
- 介绍了利用VHDL实现八位除法,采用层次化设计,该除法器采用了VHDL的混合输入方式,将除法器分成若干个子模块后,对各个子模块分别设计,各自生成功能模块完成整体设计,实现了任意八位无符号数的除法。 -Introduced the use of VHDL to achieve eight division, the use of hierarchical design, the divider using VHDL mixed-input methods, will be divided in
VHDL
- 这是关于VHDL的五个简单程序，跑马灯、简单时钟、4*4键盘、计价器、7人表决器。-This is about the five simple VHDL program, marquees, a simple clock, 4* 4 keyboard, the meter, 7 voting machine.
paobiao
- 这个程序是用verilog语言下的数字跑表实验，经测试，好用。-This program is a digital stopwatch experiments under the verilog language, tested, easy to use.
4MUL
- 四位并行乘法器的VHDL源代码，已通过验证，可以使用-Four parallel multiplier VHDL source code has been validated, you can use
my_uart
- 一个简单的UART串口程序，能实现数据的发送与接收，但没有奇偶校验等验证数据传输是否正确。-A simple UART serial program, can send and receive data, but there is no parity and other validation data is correct.