资源列表
I2C_slave_module
- 实现IIC从的VHDL代码，实现外部摄像头的数据交互和控制-Achieve the IIC from the VHDL code that implements the external camera data exchange and control
VHDL
- 设计一个具有进位输入和进位输出的8位行波进位加法器-8-bit ripple carry adder design having a carry input and a carry output
LCD1602时钟程序
- LCD1602时钟程序
idct
- invert discret cosinus transformation VHDL code
seqdetect
- sequence detector for static random access memory
19854799dul_ram(yk)
- 双口RAM的FPGA源码Altera 活XIinx或ATmel公司都可以-Dual-port RAM of the FPGA source
i2c_master_byte_ctrl
- i2c core : i2c master byte control
ioport
- 一个简单的ioport芯片的VHDL描述，希望对大家有点帮助-Ioport a simple chip VHDL descr iption, I hope all of you a little help
counter
- 应用FPGA中VHDL语言编写计数器程序-Application of VHDL language preparation FPGA counter program
iic_eeprom
- IIC EEPROM接口测试程序，Xilinx参考设计，ML507硬件测试通过.-IIC EEPROM interface test code，Xilinx reference design，tested on ML507 platform.
count
- 用Vrilog实现了一个计数器，并用七段数码管进行显示，运用了时分复用，代码简单明了，适合基础学习。-Using Verilog to achieve a counter, the code is simple and clear, suitable for basic learning.
uart
- UART接 口UART接 口UART接 口-UART Interface Interface Interface UART UART UART UART Interface Interface