资源列表
4-16.doc
- 4-16译码器，用VHDL编写的，可以直接下载到可编程逻辑器件中-4-16 decoder, written with VHDL, can be directly downloaded to the programmable logic device
uart
- UART 程序 接收、发送、波特率发送 验证-UART program to receive, send, send verify the baud rate
chumoping(Verilog)
- verilog实际例子，非常适合初学者学习-verilog practical examples, very suitable for beginners to learn
M_UartRecv0
- rs232串口基于VHDL的代码 很有用的 正确的 rs232串口基于VHDL的代码 很有用的 正确的-RS232 serial port based on VHDL code is very useful for the correct RS232 serial port based on VHDL code is very useful
dtmf
- dtmf 8880 tx phone ca-dtmf 8880 tx phone call
6713_FPGA_top
- TI DSP6713开发板FPGA的主程序，带有详细注释，对初学者很有帮助-TI DSP6713 FPGA development board of the main program, with detailed notes, very helpful for beginners
用vhdl语言编写的2进制到10进制转换的程序
- 本文为用vhdl语言编写的2进制到10进制转换的程序，为doc格式，使用前复制于maxplus等相应软件中使用。,This article was prepared by using VHDL language 2 hex to 10 hex conversion procedures for the doc format, the use of pre-replication in maxplus, such as the use of corresponding software.
shiftbetweenserializationandparallel
- 在数据的输入过程中可完成并行数据和串行数据的转换-shiftnbetween berialization and parallel
PLL210M
- 用VREILOG编写DDS模块 modelsim功能测试通过 十分好用-VREILOG to write the DDS module modelsim function test by the very easy to use
verilog
- 利用verilog HDL编程驱动7段译码显示器，采用一位8进制方式，已在DE1开发板上得到验证。-Using verilog HDL programming display driver 7 of decoding, using an 8 hex mode, has been validated in DE1 Development Board.
i2c_6114
- 使用FPGA对NVP6114进行配置！绝对原创，已经成功应用到AHD高清监控机上。代码为纯VHDL编写，不是软核的。-Using FPGA to configure NVP6114! Absolutely original, has been successfully applied to the AHD high-definition monitor system. Write code for pure VHDL, not NIOS or MicroBlaze.
vrilog
- 包含交通灯实现等几个vrilog硬件编程的程序，基本均为老师亲自写的范本，供我们参考用的-Contains several traffic lights to achieve vrilog hardware programming procedures, teachers are personally write the basic template for our reference