资源列表
hi
- Hi this very important code of router by using verilog -Hi this is very important code of router by using verilog
greth_rx
- 以太网接受程序，用VHDL语言编写，调试通过-Ethernet acceptance procedure, using VHDL language, debugging through
8-cpu
- 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc
spi
- SPI 通信模块 接收I2C读取/写入消息，并驱动I2C驱动模块读写I2C设备，发送返回消息 到上位机软件。-SPI communication module receives I2C read/write messages, and drive the I2C driver module to read and write I2C devices, send a return message to the host computer software.
SPIMaster
- verolog语言编写，功能如标题所示。有问题请联系mxkmxm@126.com-verolog language, functions such as the title indicates. There are problems, please contact mxkmxm@126.com
UART_based_on_VHDL
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能-The function of this module is to realize the UART communication between PC and terminal
viterbi
- verilog程序，实现了（2，1，4）卷积码编码，和基于回溯算法的维特比译码器-verilog program to achieve the (2,1,4) convolutional code encoding, and algorithm based on the back of the Viterbi decoder
urisic
- 用代码来控制urisc控制器，实现微码控制单元
multi8x8
- 实现了VHDL乘法器，8位乘法操作的完成
Practica-8
- FPGA code descr iptions to display characters on LCD
gcd_disp
- 一个gcd_disp VHDL程序,速度很快-a VHDL program of gcd_disp with rapid speed
3
- 基于VHDL语言的3级序列的产生，可以循环产生周期为7的m序列