资源列表
fp_adder
- this a code for implimenting floating point adder on FPGA -this is a code for implimenting floating point adder on FPGA
daima
- 状态机控制AD转换模块 该模块主要实现对MAX197的控制：根据设计需要对芯片进行初始化（包括写控制字选择输入电压值范围、选择通道以及工作模式），并把通道数送指示灯显示以及用键盘控制通道号（按一下，通道号加1，同时点亮相应的指示灯，循环使用个通道）；控制状态机的工作时序，并置两次采集到的数据为12位数据输出，并经过锁存进程来锁存数据，最后从锁存器中把输出数据-The state machine controls AD and changes the module this module ma
iic
- 使用verilog编写的IIC程序，在Quartus中调试通过，初学者可以参考。-Verilog prepared IIC program in Quartus through debugging, and beginners can refer to.
div_restore
- example about how to creat a dive method by VHDL
i2c_7113
- 利用I2C配置SAF7113的代码，利用vhdl语言编写。-Config the SAF7113 via I2C,write in VHDL.
RTC_DS1307_read
- this simple program shows how to read RTC from DS1307 in Arduino environment
i2c_slave_con
- 可以支持连续读写的i2cslave源码，很适合作为master的testbench来用-can support continuous reading i2cslave source, very suitable as a master to the use of testbench
2
- Verilog多功能数字时钟，是一个可在开发板上实现的时钟程序,不仅可以做为时钟用,还另外加了个跑秒的功能.-Verilog multifunction digital clock is a clock in the development process to achieve the board, not only can be used as the clock use, but also other added a second run features.
add8
- 用VHDL语言实现的八位计数器 可进行简单的加减乘除运算-It is a counting device with eight-bit that could plus ,subtract ,multiply and divide.
mapped_and_demapper
- Mapper and Demapper in vhdl code
geshihua
- 读取文件的数据,并且按照一定的栏位排序.-Read the data file, and in accordance with a certain sort column.
RS232RefComp
- rs232 接口程序程序 fpga开发版程序-rs232 interface to fpga Developer Program Program Program