资源列表
fft_1024
- 1024点FFT处理器，能通过quartusII验证通过-1024 point fft code,can pass the test of the software quartusII
uart
- uart代码在FPGA开发板与电脑之间上实现其功能-uart code between the FPGA development board and computer
24clock
- 实现60进制的计数，每60个脉冲上升沿进一次位。-60 M
uart_send5bytes
- CPLD实现串口发五个字节，有校验，验证可用。注释明了-CPLD realization of the serial transceiver five bytes, verification, validation available. Note clear
XC95288-optical-cable-host
- 本程序是基于Xilinx的CPLD95288芯片开发的光线通讯，AD7656AD采集功能的主机程序。-This procedure is a host-based communications program light of CPLD95288 Xilinx chip development, AD7656AD capture capability.
lvds
- 本人正在学习vhdl语言，买了套开发板，这些是配套光盘里的内容，非常难得，网上找不到的-I was learning VHDL language, bought a set of development boards, which are compatible CD-ROM's content, and very rare. not online! !
max197
- FPGA实现MAX197读写程序，经过验证-FPGA control 12bAD max197
bin
- BIN dumps for printer toners
non_ham_en_decoder
- 不组帧汉明编码/解码，Verilog语言实现，带仿真程序。 -No framing hamming encoding/decoding, Verilog language, with the simulation program.
romPlcd1602
- 用verilog hdl实现从fpga内部rom中读取数据在lcd1602上显示-The data in the fpga rom is read out and shown in lcd1602 by verilog hdl
askisi
- Simple vhdl code example
cycle_en_decoder
- 卷积码编码/解码，Verilog语言实现，带仿真程序。-Convolution encoder/decoder, Verilog language, with a simulation program.