资源列表
I2C_register
- ov7670的寄存器赋初值文件，用verilogHDL编写，设定为rgb格式，640*480大小。-ov7670 register initial value file, with verilogHDL write, set to rgb format, 640* 480 size.
RAM
- 用verilog实现了IP核的使用，例化了一个RAM，用来进行读写操作，另外还编写了斐波那契数列来进行测试。-Using verilog to achieve the use of IP core, the instantiation of a RAM, used to read and write operations, in addition to the preparation of the Fibonacci sequence for testing.
usbin_v1.7
- 用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
randon_numder_generator
- random number generator it generate random number continousely on clk pulse
UART
- 设计一个具有固定波特率的UART串口收发器，可以实现9600波特率的串口通信，能够与PC机串口进行通信，支持8比特数据位、1比特停止位、无校验、无硬件流控模式。-Designed with a fixed baud rate of UART serial port transceiver can achieve 9600 baud serial communication, able to communicate with the PC serial port, support for 8-bi
Contrl_MV
- 心电图机中1MV定标电路的VHDL代码，可以实现
SHA_1_V
- 基于FIPS 180-4标准的SHA-1算法的verilog HDL实现-FIPS 180-4 standard SHA-1 algorithm-based verilog HDL implementation
addersub4
- 用拨码开关输入两个四位二进制数，按下运算按钮后，以 led 的方式显示运算的结果。拓展 1 ．在基本功能实现前提下，增加一个清零功能。 2 ．更换显示方式，结果用数码管进行显示。 3 ．对溢出值的考虑。如果发生溢出现象，则数码管显示“ E ”。 -Use DIP switches to enter two four binary numbers, press the operation button to display the results led the operation
main
- maxhxo 系 列 的 主 程 序 。-the main program of series of machxo。
LED
- 控制led发光的Verilog代码，实现流水灯的效果。-Control led light Verilog code, to achieve the effect of light water.
12-Flashing_LED
- 采用低级建模方式编写的任意可控流水灯程序，程序本身不难，主要是描述建模思想供大家学习-Using low-level modeling approach to the preparation of any controllable light water program, the program itself is not difficult, mainly descr iptive modeling idea for everyone to learn
signal_gen
- 用于产生RGB信号，经常用于测试，非常经典-generate RGB signal，classically