资源列表
Hardware_Multiplier
- 用VHDL写的硬件乘法器，以及测试过了，一个时钟周期内完成乘法运算。被乘数、乘数的宽度通过通用属性GENERIC参数改变而轻松改变，硬件除法器也快好了。-Written by VHDL hardware multiplier, and tested, and a clock cycle multiplication. Multiplicand, multiplier width parameter changes through the common property of GENERIC an
div
- 256分频 用VHDL编程实现 检验过了 可以用的 欢迎修改改进 -Frequency of 256 tested with VHDL programming welcome changes that can be used to improve thanks
chuli
- 四个模块，用来完成数字比较，移位，逻辑运算，符号数加法等功能-Four modules, for performing digital compare, shift, logical operations, additions and other functions symbols
AD2S80
- 轴角转换芯片AD2SBOA的顺序代码，将角度信息输入到FPGA并精粗通道数据整合-Code of the the angle Converter chip AD2SBOA the order, the angle information input to the FPGA and to roughage channel data integration
ds1820
- 实时控制温度达到所设定的温度范围内，并用lcd显示出来-Real-time control the temperature reaches the set temperature range, and the lcd display
I2CIF
- I2C mater control IF
DS18b20
- 这是一个工业用的普通温度传感器DS18b20的VHDL文件，直接可用，可为FPGA的其他逻辑模块或者Nios提供接口，其输出为18b20的11位温度暂存器的值。-This is a common logic module for DS18b20 which can provides parallel outputs for Nios II or other internal units of FPGA.
pipelALU
- pipeline ALU verilog code
LS022Q8UX03B
- LS022Q8UX03B (NOKIA 6280) LCD module initialization source code
FPGAscp1000SPI
- FPGA与 scp 1000压力传感器SPI 接口描述，比较有难度，该代码可以综合，用verilog 写的。-FPGA and scp 1000 SPI
lfsr
- In computing, a linear feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state.
m_decoder
- 恢复以曼彻斯特编码格式输入的mdi信号成实际数据并存储在双端口RAM后以中断方式通知DSP读取数据，所需双端口RAM程序可以从相应的FPGA编译系统中产生-A return to the Manchester encoded signal is input into the actual data mdi and stored in the dual-port RAM notify the DSP after the break to read the data, the required du