资源列表
rec
- 双口ram的写入程序，用于fpga，测试通过-ram' s written procedures
lcd_display
- 基于SOPC技术的LCD控制接口的VHDL语言设计-SOPC-based LCD technology, the VHDL language design control interface
filter
- 关于数字滤波器的FPGA实现,基于Verilog语言的,对研究滤波器的有一定帮助!-FPGA implementation of digital filters, based on the Verilog language, the study of the filter of some help!
LPF_10K
- 10MHz采样率1Bit输入10KHz数字滤波器。-10KHz bandwidth 1Bit digtal fir filter at 10MSps
music-by-FPGA
- 音乐发生器，使用FPGA产生音符，实测通过。-music by FPGA
BasedonFPGADCmotorController
- 这是我收集的基于FPGA的马达控制程序，仅供初学者参考。-Based on FPGA DC motor Controller
XilinxExample.tar
- xilinx software to demonstrate vhdl programming
PWM_GENERATOR
- PWM, or Pulse Width Modulation, is a method of controlling the amount of power to a load without having to dissipate any power in the load driver.
compare8
- 文件程序是VHDL语言实现8位的比较器代码，详细类容见代码原文件-VHDL language file program is 8-bit comparator code, detailed class content See the code of the original file
sanjiaobo
- 本VHDL程序为三角波程序，能够实现三角波的输出，原理为通过8位二进制的递增和递减实现三角波形-This VHDL for triangle wave program program, will be able to realize the triangle wave output, principle of eight binary through increment and decrement realize triangle waveform
lift
- lift verilog HDL code
divider-achieved-by-verilog
- 该代码用Verilog语言实现了分频功能，主要实现对输入时钟的54分频，已通过仿真验证。-The code in Verilog realize the crossover functions, the main achievement of the input clock frequency of 54 minutes, has been verified by simulation.