资源列表
b16
- 一个verilog实现的16位堆栈型处理器，实现了32条指令，fpga实现频率为26Mhz！-Verilog implementation of a 16-bit stack-based processor to realize the 32 instructions, fpga implementation frequency of 26Mhz!
ex
- 基于fgpa的电压表程序，VHDL，数字电压表的VHDL设计与实现-Procedures based on fgpa voltmeter, VHDL, digital voltage meter Design and Implementation of VHDL
CAcode
- 这是一个产生CA码的程序,fpga使用,VHDL编写-This is a generated procedures of the CA code, fpga uses to write the VHDL.
viterbi
- VHDL 程序，实现vertibe的编码和解码。
RGB_480P
- 用VHDL写的，将24bit的480P数据直接存储到fifo中，经过实际的板子验证。还可以通过更改参数改到其他格式，如1080P，720P，720I等。-Written with VHDL, the 480P 24bit data will be stored directly to the fifo, after the actual board certification. Can also be changed by changing the parameters to other for
tiaoshi-
- AD9851与单片机的联合使用，并与lcd，以及按键相结合-Used in conjunction with the AD9851 single-chip, and with the lcd, and a combination of keys
serial-port-communication
- 实现串口通信的verilog代码，简述基本串口通信功能的实现-serial port communication verilog code
diaziqin
- 这是一个简单的VHDL电子琴程序，分为三个源代码，与其他的源代码不同的是，这个代码比较简单，适合于初学者。-This is a simple flower VHDL procedures, divided into three source code, source code with other difference is that this code is relatively simple, suitable for beginners.
adc0804
- VHDL语言描述，用于实现ADC0804直流采样和显示-VHDL language descr iption, for the realization of the sampling and display the DC ADC0804
vclkdiv
- 在QuartusII软件中用Verilog HDL编写的关于分频器的源代码-With in QuartusII software written in Verilog HDL source code of the divider
BCDclock
- 基于bcd码校时的数字钟，带闹钟，正点报时，和日历功能
16FFTverilog
- Hello, i have uploaded some interesting files - Hello, i have uploaded some interesting files ...