资源列表
fifo_test
- FIFO读写verilog程序，经本人验证，能够顺利运行。实现FPGA对fifo的控制。-the example of writing and reading the fifo ram of the fpag,i have already tested it.
LEDbrightness
- 使用PWM控制LED亮度的单片机C代码，共计十个亮度。-PWM control of LED brightness microcontroller C code, for a total of ten brightness.
SPI_Interface
- This module implements Serial Pheripheral Interface(SPI) Slave logic. It Communicates with MCU(Master).SPI Mode CPOL = 0 CPHA = 0 Serial Clock frequency MCU is 1 MHz. For SPI Mode CPOL = 0 CPHA = 0 -This module implements Serial Pheripheral Inte
clock
- 采用可综合的Verilog代码编写一个带闹钟功能的数字钟。使其具有以下功能： 1)计时功能：包括小时、分钟、秒钟。 2)校时功能：对小时、分钟和秒钟进行手动校时。 3)定时和闹钟功能：能在手工设定的时间产生闹铃音。 -Using synthesizable Verilog coding a digital clock with alarm. It has the following features: 1) timing functions include: hours, m
E_watch
- 一款电子表芯片，能够能够显示年月日，星期，并且实现闰年的自动调整。-An electronic table chip that can be able to display the date, day of week, and automatic adjustment for leap year.
FFTcode
- 快速傅里叶变换 快速傅里叶变换 -Fast Fourier Transform Fast Fourier Transform FFT Fast Fourier Transform
fudian_mul
- 实现32位浮点减法器，具体结合加法器和乘法器来实现快速傅里叶变换。-use VHDL to finish the sub device.
ram_16bit.rar
- RAM写入16位，读出16位,并且通过计数器控制ram可以实现读入多个数据,This ram can write 16bits and read 16 bits
verilog-divider-code
- Verilog编写的分频器程序，包括偶数分频和奇数分频，作为参考。-verilog divider code
Yeni-WinRAR-archive
- vhdl defination beginning starter
uart_tx
- 带有奇偶校验功能的的串口发送模块，实现uart功能。verilog硬件描述语言实现-With the function of parity of serial port to send module, uart functions.Verilog hardware descr iption language to realize
基于FPGA的乒乓RAM
- 控制读写乒乓RAMip核代码，通过控制FPGA内部RAM的的读写地址来控制RAM的读写