资源列表
xapp655
- xapp655 from xilinx website: Mixed-Version IP Router (MIR) in Verilog
picoblaze
- xilinx picoblaze八位嵌入式控制器的一点资料-xilinx picoblaze 8 bit embedded controller for information
xilinx-documents
- 从网上搜集的一点资料，方便同行初学者了解相关知识-That the information collected from the Internet to facilitate the understanding of the relevant knowledge of peer-beginners
VGA
- 用VHDL实现的VGA彩条，在spantan3e上验证-VHDL implementation with VGA color bars, to validate the spantan3e
divider
- 用VHDL实现了一个计时器，在SPANTAN3E上验证通过-VHDL, implements a timer, in the SPANTAN3E verified by the
contrato
- VHDL multiple exercises
OK-fifotest-important_high_to_low
- 实现了FIFO的乒乓操作，低速到高速的变化。-Achieve pingpang operation of FIFO
qiduanma
- 用verilog描述的七段码程序，包含测试文件，经过了quartusii仿真测试并成功下载到DE3板子-Described in the seven-segment code with verilog program, including test file, after quartusii simulation testing and successfully downloaded to the board DE3
VHDL
- 用VHDL编写的数字时钟，数码管显示时钟，已经通过编译-VHDL
Frompoint-basedtofeature-basedaerialtriangulation.
- 关于空中三角测量中基于点的做法和基于特征的做法的比较.-its about areotriangulation from point to feature
BULKFPGA
- 用quartus2编写的,Verilog HDL,测试BULK和FPGA通讯的程序-With quartus2 written, Verilog HDL, testing, and FPGA communication procedures BULK
4Day
- 《4天学会Design Compiler》的中文版。 《4天学会Design Compiler》大家都该知道的，一个很好的DC入门教才，我也是学习时找到了这个中文版。 《4天学会Design Compiler》可以在xunlei上下载到。-" 4-day Institute of Design Compiler" the Chinese version. " 4-day Institute of Design Compiler" Everyone in