资源列表
FPGA_double_DDS
- High performance double sinusoidal oscillator having frequency and phase programmable. -High performance double sinusoidal oscillator having frequency and phase programmable.
FPGA_cy7c68013
- 本工程包括FPGA程序和CY7C68013固件程序。 上位机程序通过EZ-USB CONTROL PANNEL 来测试。-The works include the FPGA programs and CY7C68013 firmware. Host computer procedure EZ-USB CONTROL PANNEL to test.
Number_Lock
- 数字密码锁，能进行10位密码的加锁与解锁。 -Number of locks that can be 10-bit password, locking and unlocking. Number of locks that can be 10-bit password, locking and unlocking.
serial_input_parallel_output_module
- 有一批数据并行输入，位宽为4，输入的时钟频率是20MHz，模块的功能是对这些数据进行并串转换。它每收满6个数据（一个包），就对这6个数据进行处理，将这6个数据按照一定的顺序串行输出，输出的时钟频率是80MHz-serial input parallel output
XilinxExample.tar
- xilinx software to demonstrate vhdl programming
Verilog
- VERILOG语言的学习，更好的运用CPLD，FPGA-VERILOG language learning, better use of CPLD, FPGA
BUIW_framework
- 这是一篇关于buiw的框架说明文档，很值得学习。-It display buiw framework！
manchesterbyxilinx
- 曼彻斯特编解码的实现（Verilog）,包含有测试文件。-manchester encode and decode with verilog，Test File is included。
FREQTEST.tar
- VHDL写的16进制显示数字频率计，用8位数码管显示-16 hexadecimal display digital frequency meter VHDL
learnVHDL
- 哈尔滨工程大学的VDHL课件，希望能更好地帮助大家学习VHDL语言-Harbin Engineering University of VDHL courseware, hoping to better help them to learn VHDL language
zhedashumo
- 浙大数学建模课件，很不错的，希望对你们有用-zhe da shu mo kejian
NewFolder
- these are some verilog codes