资源列表
ADD
- 含异步清零和同步时钟使能的4位加法计数器的设计-Synchronization with asynchronous clear and clock enable the addition of four counter design
clock
- 秒表，含24进制时钟和60进制的分钟和秒钟-Stopwatch, clock with 24 hex and 60 hex minutes and seconds
SIN
- 用状态机对DAC0832电路实现控制SIN函数发生器-DAC0832 state machine for controlling SIN function generator circuit implementation
DMA
- DMA方式A/D采样控制电路设计，输出数据-DMA mode A/D sampling control circuit design, output data
FRENQ
- 4位十进制频率计的设计，通过采用1Hz时钟对待测时钟进行频率测定-4 decimal frequency of the design, through the use of 1Hz clock to treat the measured clock frequency measurement
LDPC_DVB-T2
- LDPC encoding code in 1/2code rate for DVB-T2
uart_async
- RS232串口通信代码，采用verilog HDL实现，在quartus上仿真通过并下载到fpga平台功能验证-RS232 CODE
fdiv7
- 程序实现对输入时钟信号的7分频，程序采用两个计数器，一个由输入时钟的上升沿触发，另一个由时钟的下降沿触发，最后将2个计数器的输出相或，即得到占空比为50 的方波。-Program realizes frequency devision-by-7 of the input clock signal , the program uses two counters, one triggered by the rising edge of the input clock, and the other t
AD0809
- ADC0809是8位AD转换器，片内有8路模拟开关，可控制8个模拟量中的1个进入转换器中，完成一次转换的时间约100us。-ADC0809 is 8-bit AD converter, In the chip, there are 8-channel analog switches that can control one of eight analog quantity into converter, the time of a conversion is about 100us.
add4_bcd
- 程序描述了BCD码加法器，采用的是逢十进一的规则。-Procedures described BCD adder, using the rules of decimal.
bpltonrz3412_12M
- The above source code for converting bi phase L to Binary, at the 6144 bit rate
pdiv
- 数控分频器的功能是，当在输入端给定不同的输入数据时，对于输入的时钟信号有不同的分频比。-The function of this divider is when different input data is available at the input,there is different divider ratio for clk.