资源列表
SSRAM_Control
- 參考ARLTERA 此為SSRAM_Contral
MAX197-5STATE
- 使用Verilog在Quartus II下编写的MAX197 AD采集程序，系统时钟50MHz。经测试完全可使用。-Use Verilog in Quartus II prepared MAX197 AD collection procedures, the system clock 50MHz. Tested fully use.
mariobros
- simula la musica de mario bros por medio de sonidos mediante una fpga-simula la musica de mario bros por medio de sonidos mediante una fpga
i2c_latest.tar
- 可综合iic从机模块，通过modelsim仿真-Synthesizable iic slave module.Modelsim simulation passed.
spi_module
- 使用FPGA编辑Verilog语言来实现控制SPI，完成SPI时序，并在该时序下实现数据的传输和接收。-FPGA and SPI
vga
- Link the VGA adapter located in the altera DE2board to a monitor
sd_ctrl
- verlog实现的sd卡控制程序，已经在quartus下面编译验证通过-Verlog implementation of the SD card control procedures, has been compiled under the quartus validation
Camera_ED
- 摄像头接口程序，采集摄像头数据并从HDMI接口显示在液晶屏幕上面-Camera interface program, collecting data the camera HDMI interface displayed on the LCD screen above
HDMI_test
- HDMI显示数字钟，把之前编写的数字钟程序用HDMI接口显示在电子屏幕上-HDMI display digital clock, digital clock to before you write a program using HDMI interface displayed on the electronic screen
osd_grayscale
- HDMI显示，显示灰阶，网上的资料大多是VGA的，我这里是HDMI的！！！虽然没啥不一样... 显示复杂的灰阶-HDMI display, gray scale display, online information mostly VGA, and I have here is the HDMI! ! ! Although nothing is not the same gray-scale display complex ...
boomshakalaka
- Verilog实现数字钟，超多功能，移位显示，闹钟设置，移位设置时间，定时秒表，控制LED记录数值等-Verilog digital clock, ultra-versatile, shift display, alarm settings, set the time shift, the timing stopwatch, and other numerical control LED record
four_bit_adder
- four bit adder digital circuits vhdl