资源列表
LVDS_Serdes_list_FPGA1
- FPGA之间的LVDS传输,采用serdes接口,传输速率达到400m-LVDS transmission between the FPGA using serdes interface, transfer rate up to 400m
bus
- 显示总线扩展的_VHDL代码,大家共同学习。-Show that the expansion bus _VHDL code, a common study.
screen
- 读屏幕上亮点坐标的VHDL代码,共同学习。-Read the screen coordinates of the bright spots on VHDL code, a common study.
rectangle
- 在屏幕上形成矩形的VHDL程序,感觉还可以。-Rectangle on the screen at the formation of the VHDL process can also be felt.
pld
- 四字路*通灯管理器的设计(含波形输出)-Management of traffic lights at the junction word design (including waveform output)
ex
- 用HDPLD实现的高速并行乘法器,其输入为两个带符号位的4位二进制数- HDPLD implementation with high-speed parallel multiplier, the input symbols with two 4-bit binary number
c3
- 在FPGA实现的加法器实现的Veilog代码,应用软件为赛林思公司的ISE9.1-adder Veilog
serial_uart_top_new
- FPGA Cycloneii 系列的,测试串口通信程序,编程语言简洁,串口速率是115200bps,测试后好用的-Series FPGA Cycloneii to test the serial communication program, the programming language is simple and serial rates are 115200bps, easy-to-use test
sin_sample_clock
- EP2C CYCONLY 系列的FPGA时钟测试程序,是由内部时钟分频后,点亮数码显示灯来证明的。绝对好用的程序。编写的执行效率很高-EP2C CYCONLY series FPGA clock test procedure is determined by the internal clock frequency, the lamp lit digital display to prove. Absolute-to-use program. The preparation of the imp
usb-driver
- Xilinx USB下载线 Linux驱动,支持原来并口线,以及现在USB线,最重要的是支持基于FT2232的简易USB JTAG,FT2232不仅可以通过OpenOCD调ARM,还可以下载Xilinx FPGA了!-linux driver of Xilinx USB Platform cable, support xilinx usb cable and parallel cable, in addition, it support usb jtag based on FT2232!
lcd
- 用sopc技术实现对128*64的lcd液晶显示。这里是它的程序。 -Sopc technology used for implementation of 128* 64 LCD lcd. Here is the procedure.
8080cpu
- this code for cpu 8080 design -this is code for cpu 8080 design
