资源列表
VGA_controller
- VGA Controller with VHDL
VGA
- VGA 640*480 controlling and blanking signal in Verilog HDL .
SDR-SDRM
- 该工程对三星SDR SDRAM（K4S641632）进行读写，工程内部分为PLL以及复位处理模块、写SDRAM逻辑模块、读SDRAM逻辑模块、SDRAM读写封装模块、读写缓存FIFO模块、串口发生模块等-The project of Samsung SDR SDRAM (K4S641632), read and write, internal engineering points for PLL and reset processing module, SDRAM logic module, S
MUX_VHDL
- A multiplexer allows digital signals several sources to be routed onto a single bus or line. A input to the multiplexer allows the source of the signal to be chosen. We look at two multiplexer examples in this tutorial, the first multiplexes two
xuljc
- FPGA编程，用Verilog语言实现序列检测功能-The FPGA programming, using Verilog language implementation sequence detection
taxi
- FPGA编程，用Verilog语言实现出租车计费器功能-The FPGA programming, the taxi is realized with Verilog language features
counter
- FPGA编程，用Verilog语言实现4位累加器功能-The FPGA programming, realize four accumulator with Verilog language features
clock
- FPGA编程，用Verilog语言实现数字钟功能-The FPGA programming, the function for digital clock with Verilog language
Source
- This power point file consist of a lot of different vhdl code for component with source code VHDL (VHSIC Hardware Descr iption Language) is a hardware descr iption language used in electronic design automation to describe digital and mixed-signa
traffic
- FPGA编程，用Verilog语言实现交通灯功能-The FPGA programming, implement traffic lights with Verilog language function
uart_txrx
- fpga 串口发送与接收VHDL硬件语言实现。附有仿真测试程序。-fpga serial port to send and receive VHDL hardware language. With simulation testing program.
IIR_TEST
- fpga开发IIR滤波器，滤除声音中的噪声。-fpga development IIR filter, filter out the sound of the noise.