资源列表
VHDL-programming-by-example-4th
- douglas perry vhdl programming by example 4th edition
qiangdaqi
- 本程序为四路抢答器verlog HDL语言工程实例。-This program is four Responder verlog HDL language engineering examples.
guang_module
- TCD1209的驱动程序，可以编译通过的！-TCD1209 driver can be compiled by!
Pseudo-Random
- Pseudo Random Sequence Generator Code and Tutor
01-vga_module
- VGA接口驱动程序，用于通过VGA接口控制液晶显示器-VGA interface driver
FPGA_Timing_Constraints_byCamp
- 简要地说明时序约束的内容，对入门级的朋友相当起到引导的作用-Briefly describes the content of timing constraints on entry-level friends rather play a guiding role
hdb3a
- 快速实现HDB3码与普通码二进制码的转换，方便学习与了解HDB3码的转换-Quickly achieve HDB3 code and common code binary code conversion, facilitate learning and understanding HDB3 code conversion
ryg
- 双模交通灯系统，实现交通灯不同通断时间控制方案，及手动控制，基于VHDL语言，DB2平台，时间通过数码管显示-Dual-mode traffic light system, different traffic lights-off time control scheme, and manual control, based on the VHDL language, DB2 platform time through the digital display
divfrequency
- verilogHDL程序,成功实现 二分频-verilogHDL program successfully achieve divide
ALU
- 基于FPGA实现的简单ALU。ALU中主要包含有符号的加法、减法、乘法、左移、右移。ALU的顶层要控制运算和复位。-FPGA-based implementation of a simple ALU. ALU mainly contains symbols of addition, subtraction, multiplication, left, right. To control the operation of the ALU and reset the top.
inequal-lenghth-code
- 不等长编码的设计，对莫尔斯电码的改进，用vhdl实现-Unequal-length coding design, Morse code improvements, using vhdl
excess-3-code-adder-subtructer
- 余3码excess-3 code加法器和减法器，用vhdl实现-I 3 yards excess-3 code adder and subtractor using vhdl