资源列表
modbus_latest.tar
- modbus的fpga实现。opencores上最新版本。使用fpga实现，可以大大提高响应速度，对其功能进行模块化。-modbus of fpga implementation. opencores the latest version. Use fpga implementation, can greatly improve the response speed, its function modularity.
vga_lcd_latest.tar
- 该OpenCores的增强VGA/ LCD 控制器核心提供了VGA 能力的嵌入式系统。它 同时支持CRT和LCD显示器 与用户可编程的分辨率 和视频定时，从而提供了 几乎所有可用的兼容性 LCD和CRT显示器。-The OpenCores Enhanced VGA/LCD Controller Core provides VGA capabilities for embedded systems. It supports both CRT and LCD
lab4
- 如何扫描一个键盘的内容进入LED显示以及将hyperteminal的内容传入lcd显示-How to scan the contents of a keyboard to enter the LED display and the contents of incoming hyperteminal lcd display
yuv422tobt1120
- yuv422转bt1120时序，vivado工程，用tpg做信号源-yuv422 to bt1120
triangular_vhd
- This the triangular wave generation vhdl code to check the wave form in modelsim simulator-This is the triangular wave generation vhdl code to check the wave form in modelsim simulator
STDL80.ZIP
- Leonardo综合器用STDL80 0.5um综合库，安装见说明，找到它真不容易。-STDL80 0.5um ASIC Library for Leonardo
CLK_GEN
- Xilinx FPGA时钟倍频电路，使用内部全局时钟、DCM，可参数化。-Clock Generater for Xilinx FPGA
async_fifo_prj
- Verilog语言写的异步fifo，包含随机数产生电路和testbentch,直接可用于实际工程中。代码为华为内部代码。相信你会喜欢。-Verilog language used to write asynchronous fifo, including random number generation circuit and testbentch, can be used directly in the actual project. Code for Huawei internal code
water_light
- Verilog语言的流水灯设计程序，对初学者很有用。-Water lights Verilog language design program useful for beginners.
NCO_test
- FPGA的压控振荡器NCO完整Verilog工程代码，测试输出1KHZ sin波。signaltap抓取没问题。-VCO NCO complete FPGA Verilog code engineering, test output 1KHZ sin wave. signaltap crawl no problem.
07_number_mod
- 基于verilog的数码管显示,浅显易懂，下载即可调试使用-Verilog based digital display
12_lcd_spi
- 用于FPGA开发板的LCD显示实验源码包，欢迎大家下载交流，有不周之处还望批评指点！-For FPGA development board LCD display experiment source package, welcome to download the exchange, there are ill also look criticism pointing!