资源列表
wei
- 为随机序列的FPGA实现 可变长度。值得学习-FPGA realization of a random sequence of variable length. Worth learning
Clock
- 多功能时钟，以调试通过，可以直接用，非常适用于FPGA初学者。-Multi-clock, in order to debug through, and can be very useful for beginners in FPGA.
DP
- TIC6000系列 C67浮点DSP处理器 派发站源代码-TIC6000 floating-point DSP processor series C67 station source code distributed
26
- battery charger for 7cell nimh with attiny26&control lcd 1x16-battery charger for 7cell nimh with attiny26&control lcd 1x16
freqtest
- 对复杂大规模可编程器件的特点，提出了一种新的数字频率计的实现方法。在QutusⅡ开发软件环境下，采用硬件编程语言VHDL，实现了数字频率计的设计。经过仿真，并下载验证。能够实现测频功能。-The complex features of large-scale programmable devices, a new realization method of digital frequency meter. In Qutus Ⅱ software development environment,
exercicio4
- VHDL program. Calculator that do basic operations. Add, subtract, divide and multiplication using Cyclone -VHDL program. Calculator that do basic operations. Add, subtract, divide and multiplication using Cyclone II
HexatoSSD
- VHDL program. It s a converter from Hex to SSD format using Cyclone -VHDL program. It s a converter from Hex to SSD format using Cyclone II
TrafficLightController
- It s a vhdl program. Simulates a traffic light controllet using a Cyclone II FPGA
UserDefinedFunction
- It s a VHDL program. The program does a generic gray. Using a Cyclone II FPGA Board.
speed_measure_on_7_segment
- Period method of frequency measuring (change constant to speed measure). DE2 Board Quartus project. Input signal on GPIO, result on 7seg, start/stop with key[0].
comp
- 数值比较器，Verilog实现，带具体实验说明文档。-Numerical comparator, Verilog realization of experiments with specific documentation.
my_code
- 编码器和译码器，Verilog实现，有具体实验说明文档。-Encoder and decoder, Verilog realization of a specific experiment documentation.