资源列表
learn2
- verilog i2c通讯协议,包括工程文件,可以直接打开-verilog i2c communication protocols, including the project file, you can directly open
Multiplier
- 复用全加器来实现乘法器, 通过从右到左互为输入输出,实现低位计算。最左向高位输出。具体要求请参见附带的PDF。-Multiplexing a multiplier to achieve full adder, input and output by each other right to left, the least significant bits is calculated. Most left output to high. Specific requirements Refer to
15NIOSIIclock
- nios num clock verilog code
Manual-elevator-controller
- 电梯控制器,是集读卡、密码键盘于一体的智能控制设备,通过该设备可以有效管理电梯乘坐人员的乱乘行为。-Elevator controller, is a card reader, PIN pad in one of the intelligent control device, the device can be effectively managed through the elevator ride by chaotic behavior of staff.
DE2_i2sound_example
- 基于FPGA I2C总线的音频处理系统设计实现-FPGA I2C bus-based audio processing system design and implementation
hamingFPGA
- 本文介绍了汉明编码与译码通过FPGA器件来实现,介绍了使用VHDL语言编程的基本算法!-This article describes the Hamming encoding and decoding through the FPGA device to implement, introduced the use of VHDL programming language is the basic algorithm!
key_seg_test
- fpga led测试提供一个简单的led测试小程序-fpga led test
AnApproachBasedonFPGAtoAccelerateAccomplishingReco
- 提出一种在 FPGA 上实现发射光谱层析技术 SIRT算法时 ,在原有资源不变的情况下 ,加速系统运算的方法。该方法把矩阵分块理论的数学原理和 FPGA 具有并行运算能力的优势有机结合 ,使运算速度有效提升。-An approach based on FPGA to accomplish Simultaneous Iterative Reconst ruction Technique (SIRT) of Emis2 sion Spect ral Tomography ( EST) is pr
Pentium
- 这两个分别是8位乘法器的VHDL语言的实现,并经过个人用QUARTUS的验证,另外一个是奔腾处理器的设计思想-The two were 8 multiplier realization of VHDL language and personal use Quartus After verification, another is a Pentium processor design idea
USB2_V
- USB2_V例子工程是一个FPGA数据通过USB2.0传输到PC机的示例.-USB2_V example FPGA project is a data transmitted to the PC through the USB2.0 sample machine.
JPEG2000
- jpeg 2000 encoder complete document
89S52heFPGA
- 关于verilog 和8052系列单片机的C语言程序 用于点阵型12864显示-fhds pd[dsfkjjklsdff
