资源列表
autosell_newspaper
- 這是FPGA自動販賣機的功能,名字為autosell_newspaper.rar,其中使用了有限狀態機。-FPGA vending machines function, the name of the autosell_newspaper.rar, which uses the finite state machine.
ACCUM
- accumulator for direct digital synthesis
cun
- 一个四个地址的四位寄存器，实现存储、读取功能，并在数码管上显示数据的地址-A four addresses four registers for storage, read function, and displays the address of the data on the digital
dds
- 采用硬件描述语言verilog进行DDS变换的实现的代码-Using hardware descr iption languages Verilog implementation of DDS converter code
74138_0
- 这是老师给的3—8译码器的源程序，自己刚才调试过了，真的成功了，哈哈……，有需要就看看吧-This the teacher for the 3-8 decoder source, have their own testing before, and really successful, ha ha ... there is a need to watch it!
state_machine
- 步进电机的vhdl驱动程序 能实现正传翻转登功能 -Vhdl stepper motor driver board flip function to achieve Story
VGAsingl
- VGA彩条显示VHDL程序，简单精炼，非常好的程序。-vga color display vhdl program
shizhong
- 这个程序是基于Quartus II的，能通过数码管显示时、分、秒，具有闹钟的功能，能通过按键校时。-his program is based on the Quartus II, and when through digital display hours, minutes, seconds, and has an alarm clock function, button through school.
simple-uart
- 书写的简单串口通信，可用于FPGA,与电脑连接，测试可用。-a simple uart communication，it can be used in FPGA，it can communicate PC to the FPGA by this code.
ask100
- 时钟同步模块：通过时钟同步模块，将模拟前端提取的时钟信号和数据进行同步，使得数字后端可以正确读取数据。-Clock synchronization module: The clock synchronization module, the analog front-end of the clock signal extraction and data synchronization, making the number of back-end data can be read correctly
Queuing
- 一种高效的排序VHDL程序，本程序节省资源，最高效的发挥FPGA的时序能力。-a kind of Queuing VHDL Program
state_machine
- 状态机控制步进电机 配套开发板型号:A-C8V4-Stepper motor control state machine model supporting the development board: A-C8V4