资源列表
PLL_1
- Phase lock loop generation for vhdl (DE2 board)
VGAVGA
- 利用VERILOG编写的基于XILINX的SPARTAN板的VGA接口显示程序
FPGA
- FPGA开发技术相关资料，可以提供给新手，中手用来进行相关内容的加深学习。-FPGA development technology-related information can be provided to the novice, the hand used to deepen the study of relevant content.
F2808Drivers
- F2808各模块驱动例程，包括SCI、SPI、PWM、I2C、ECAN-F2808 each module driver routines, including SCI, SPI, the PWM, I2C, ECAN and
nco11000
- 实现输入一正弦波和噪声的叠加，介绍详细欢迎下载-The input of a superposition of sine wave and noise introduced in detail
fifotop
- 基于FPGA编写的VHDL语言，FIFO代码程序。 程序完整。-VHDL-based FPGA written language, FIFO procedure code. Complete the procedure.
OpenRISC-GRAPHIC-ACCELERATOR.tar
- OpenRISC GRAPHIC ACCELERATOR, wonderfull efects
Exemple_1_Clock_24
- vhdl code for 24 clok with some options hope u will like it vhdl code for 24 clok with some options hope u will like it vhdl code for 24 clok with some options hope u will like it -vhdl code for 24 clok with some options hope u will like it
fp_prj
- 这是自己编写的一个流水灯程序 通过修改cs的值可实现方向的翻转 但是没有接入案件功能 需要的同学可自行添加 使用quartus12编译 modelsim10.1仿真-This is a program I have written a light water can be achieved by modifying the value of cs direction flip but no access cases feature requires students own add use qu
EET3350Lec14_shiftRegs
- EET 3350 Digital Systems Design.A register is a digital circuit with two basic functions: Data Storage and Data Movement A shift register provides the data movement function A shift register “shifts” its output once every clock cycle -EET 3350 Di
XST-User-Guide
- 在Xilinx FPGA环境下，所有涉及的高级Verilog语言的语法都有讲到，还附有例子程序-In the Xilinx FPGA environment, all involved have a high-level Verilog language syntax mentioned, but also with an example program
music
- 在FPGA平台上Verilog实现简易电子琴功能，可直接用Quartus下载到板上运行。-A simple electronic organ function