资源列表
lcd
- 基于 vhdl 的 lcd 液晶屏驱动程序-lcd vhdl
verilog_code
- Verilog code for Traffic Light Controller, Real Time Clock
1-ZIP
- 51定时器的应用定时计数器应用，实现P0.0口250ms输出1； 实现P0.0口1s输出0；-Application of the timer counter 51 timer application, to achieve 250ms more P0.0 output 1 achieve 1s more P0.0 output 0
200622810562278741
- 基与vhdl语言实现1602LCM液晶显示屏的驱动函数和实例
lcd
- verilong实现的12864液晶驱动程序，显示一幅图像-verilong achieved 12864 LCD driver, display an image
DA
- 采用Verilog在FPGA上实现一阶Σ-Δ DAC，仿真和实际验证都正确，基本可以达到16位DAC的信噪比
4bitlock
- 本文以在PFGA芯片中实现一个简单的可控正弦信号发生模块的设计为例，详细介绍DSP Builder的使用方法，从而有介绍一种另外PFGA—DSP算法的程序方法。-In this paper, in the PFGA chip to achieve a simple sinusoidal signal control module design as an example, detailing the use of DSP Builder methods, thus introducing a k
AD_CNTR4.4a
- 该程序是用vhdl控制max125进行ad转换的程序，已经在本人的板上调试通过。对于用vhdl编写ad转换程序有一定的参考价值。-The program is vhdl control max125 for ad conversion process, has been through in my board debug. Ad for the preparation of the conversion process using vhdl some reference value.
xulie
- FPGA或CPLD与DAC（DAC0800），产生一个序列检测器。-FPGA or CPLD with the DAC (DAC0800), produce a sequence detector.
61EDA_C2442
- ddr sdram控制器的例子，经过了仿真验证，没有问题-ddr sdram
verilogvga
- FPGA，VGA学习，已在硬件实现，可以工作。-FPGA, VGA Learning has been implemented in hardware, can work.
12
- 用VHDL变得一段用于1602lcd显示的程序，大家可以参考一下-VHDL has become for some procedures for 1602lcd display, we can refer to