资源列表
16bitadder
- 16位快速加法器verilong实现，很值得一看~
wcdma_reciever
- 本代码仿真了WCDMA小区搜索。cell_search_cpich scramble wcdmasource-This code emulation WCDMA cell search. cell_search_cpich scramble wcdmasource
div
- it performs the serail dividing operations
startwatch1
- 利用VHDL硬件描述语言实现 一个秒表设计，其中有5个VHDL文件。startwatch为顶层文件-The use of VHDL hardware descr iption language designed to achieve a stopwatch, of which five VHDL files. startwatch for the top-level files
PFGA-frequency--
- 用FPGA实现高频高精度的外部频率检测，并用1602液晶屏显示频率，用Cyclone II EP2C35F672C8N 型号的FPGA 可实现检测高达1.5M HZ的输入频率，对应的精度只有百分之0.5。-Using FPGA to realize external frequency detection with high frequency and high precision,and use 1602 LCD screen display frequency, using the Cyc
cpu
- Verilog实现的CPU程序，简单应用哈
VHDLtlight
- 智能控制交通灯。分主路辅路，当辅路无车时主路保持绿灯，当辅路有车通过时辅路亮绿灯，并且在最短五秒钟之后或者20秒之内返回原来的状态。-Intelligent control of traffic lights. At the main road and side roads, as roads without the green light when the main road to maintain, when the roads when the roads a car through a
uart
- vhdl code that s used to programming uart
chipromlmp
- 片内ROM的LPM应用（适用于存储容量比较大的场合，本节具体描述的ROM为存储了256个点的SIN函数值）-Slice the application within LPM ROM
yibanjiafaqidesheji-EDA
- 基于FPGA的快速加法器的设计与实现，在VHDL环境中波形图显示出结果，可以用二进制，十进制，十六进制表示 -FPGA-based fast adder design and implementation in VHDL environment, the results in the waveform display, you can use binary, decimal, hexadecimal
taxi
- 出租车自动计费系统，功能完善，方便快捷，十分好用-taxi
pinlvji
- 基于FPGA与NIOS 的源代码，主要表达了一些编程的思想。-Based on the FPGA and NIOS source code, the main expression of some programming ideas.