资源列表
Lab1
- FPGA LED. CONNECT TO BOARD SAVE AND IMPLEMENT CODE LEDS WILL LIGHT UP AND BLINK AT A CONSTANT RATE
top
- 先将并行数据转换为串行位流，再将串行位流转换为并行数据，两个模块共用一条并行总线和时钟。-First parallel data into a serial bit stream, then the serial bit stream into parallel data, two modules share a parallel bus and a clock.
Seq_det_gray
- Seq_detector in gray encoding. FSM modelling
Seq_det_binary
- FSM Seq detector in binary encoding
UDP
- UDP of Dff and mux. COntains test bench also
codes
- vhdl code for sbst and channel encrptions
Vector_Matrix_Multiplier
- VHDL Vector Matrix Multiplier
mac_accumulator
- VHDL Multiplier Adder Accumulator together with Test Bench.
TB_Read_Write_File_vhd
- Simplified VHDL testbench: Read/Write from/to Text File.
frequency-meter
- 包含的vhdl文件能够测量频率，并包含需要仿真的图形- files of compressed package can measure the frequency of VHD
digital-clock
- vhdl文件，实现数字钟，以及其顶层设计图-This package contains the VHDL file, can realize the digital clock, contains the top-level design
MacPro
- This introduces beginners on a few ways of discovering the basic details about LabVIEW 2015.