资源列表
FLASH_
- flash的读写控制最终判断读写是否一致可用LED显示，构建基本模块-flash read and write control of the final judgment is consistent read LED display is available to build the basic module
771VHDL
- VHDL学习的好的资料，内容全面，学习必备书籍-VHDL learning good information, comprehensive content, learning essential books
kekongmaichongfashengqi
- 实现各种脉冲的发生，仿真结果包含在文档中-To achieve a variety of pulse generation, simulation results included in the document
diantikongzhi
- 用VHDL实现的电梯控制系统，仿真结果，实验总结已包含在文档中-The VHDL implementation of the elevator control system, simulation results, experimental summary has been included in the document
vending-machine
- to increase the speed/Performance of the system the UT (Urdhva Triyambhayam) multiplier is used. UT Multiplier [10] is an cient methodology of Indian mathematics as it contains 16 SUTRAS (formulae). A high speed multiplier design by using Urd
ADC
- verilog At the last, before starting fist go through the FPGA NEXYS2 Board manual. It will be useful for you for this interfacing and also for the future. Best of luck…, try this one because practice makes man perfect. And, yes also if you have a
ALU
- 用verilog寫成的ALU，有簡易的加減乘除、shifting、logic gate等功能。-Written by verilog ALU, there is a simple addition, subtraction, shifting, logic gate functions.
CCSK-FPGA
- 针对CCSK软扩频功能的实现，整理了很多资料，主要有CCSK软扩频原理以及FPGA实现，形成了一个完整的资料包，与大家分享-CCSK AND FPGA
FLIR-LEPTON-CameraFPGAdriver
- FLIR LEPTON远红外摄像头FPGA驱动程序-LEPTON FPGA far infrared camera FLIR driver
ADS7870_CPLD
- ADS7870 Serial ADC Interface Using a CPLD
pic10
- 本文件夹里面的是实现pic10 CPU的全部verilog代码以及相应的测试脚本代码，当然有一些模块是在quartus中直接编辑波形测试的，所以没有响应的测试脚本文件。 tri_state_port的测试还未完成，test_pic10_status_reg.vt和test_pic10_tri_state_port2.vt都没有完成测试任务 其中有三篇文档： PIC10_RISC_Design.pdf:原文（verilog代码基本都来自原文，对一部分进行了改进），这篇文章写
lm32
- About Softpll Lattice1200 FPGA running code, and to introduce documents, want to help everyone