资源列表
leon3
- leon3 source code 虽然gaisler网站上有下载，但是提供此代码，希望能与更多的朋友一起学习leon-leon3 source code although gaisler website to download, but the provision of this code, would like to work with more friends with learning leon
VerilogHDL-huawei
- Verilog HDL 华为入门教程.pdf 内部资料-Verilog HDL Tutorial Huawei. Pdf internal information
watch
- 2个按键的跑表，一个是开始停止，一个复位-Two of the stopwatch button, one is stopped, a reset
32bits_COLOR_LED_AHDL_CODE
- 用於32位色控制的LED大屏幕的AHDL代碼-For 32-color large screen LED control of AHDL code
CPLDforCCD
- 基于CPLD的光积分时间可调线阵CCD驱动电路设计-CPLD-based optical integration time adjustable linear array CCD Drive Circuit Design
VHDLanli
- vhdl源码案例， vhdl源码案例，-VHDL source case, vhdl source case,
beep
- 一个verilog程序，写的完善，有注释，与其他蜂鸣器程序有较大改进，希望对初学者有帮助-A Verilog program, written by well-annotated, buzzers and other procedures have greater improvements in the hope to be helpful for beginners
millerdecode(050710)
- 有源代码，modelsim仿真通过，并有介绍文档。-Active code, modelsim simulation through, and to introduce the document.
freq
- vhdl语言设计频率计，十进制加法器.运用maxplus2运行，-VHDL language design frequency, the decimal adder. maxplus2 application running,
fpgacrosslightcontroller
- fpga交通控制灯，利用quartus 实现，-FPGA traffic control lights, the use of Quartus achieved
wervhdl
- 赋值语句有两种，即信号赋值语句和变量赋值语句。每一种赋值语句都有三个基本组成部分，即赋值目标、赋值符号和赋值源。信号赋值语句和变量赋值语句的语法格式如下 :-There are two assignment statements, that is, the signal assignment statements and variable assignments. Each assignment has three basic components of the assignment objec
vhdl00023kejian
- VHDL课件 张建老师的精彩课件讲述了，中国著名的嵌入式开发人 -VHDL courseware courseware wonderful teacher Zhang Jian told China s well-known embedded development people