资源列表
YCbCr_camera
- 实现YCbCr转rgb和rgb转YCbCr-Image format conversion
fenpin
- 该程序是对输入时钟进行分频，这里是可以改变分频倍数的，这个是一个八分频的程序-The program is the input clock frequency, here is changing the division multiples, this is one eighth the frequency of the program
sdram_mdl
- 基于SDRAM的读写调试试验，使用verilog语言编写，经过调试。-SDRAM-based literacy commissioning tests, using verilog language, through debugging.
uart
- 串口的实现代码，用verilog编写的，并附有仿真文件。-Serial implementation code written using verilog, together with simulation files.
iic
- i2c接口的功能实现代码，用VERILOG编写，并附有testbench.-i2c interface function implementation code, written in VERILOG, along with testbench
HAPF_SLAVE2
- 高压链式SVG控制用FPGA的verilog程序,其中包括SPI，16路SCI同步通讯模块程序，保护自锁功能程序，基于滞环的无功功率检测和补偿策略；还包括FPGA和DSP之间通过总线方式进行数据的快速交互等；程序完整-SVG high voltage chain of verilog FPGA control procedures, including SPI, 16 road SCI synchronous communication module procedures to protect
verilog_code_for_double_fpu
- 64位FPU，内含testbench，已经通过验证仿真。-64-bit FPU, embedded testbench, simulation has been validated.
Caculator
- 基于Verilog语言编写的简易计算器，实现了加减法的运算，有模块和约束文件。-Verilog language based on simple calculator, to achieve the operation of addition and subtraction, there are modules and constraint files.
Nixietube_count
- 数字电路基础课程设计,在数码管上计数，在quantusII下用vdhl与verilog编写。-count number in nixie tube
fistnoc
- VHDL CODE, WILL GIVE DESIGN ABOUT NETWORK ON CHIP
m6502
- m6502 6 bit microprocessor
uart_server
- 24路串口转1路串口服务程序, 包括FIFO模块，串口接收，发送模块，定时器模块，检测控制模块等。采用Verilog编写-24 way serial ports to 1 serial port, including FIFO module,RX module,TX module, timer module, detection and control module, etc.. Verilog preparation