资源列表
automat
- 自动贩卖机简单编码,VHDL语言编程。-failed to translate
SMBus
- 快速傅里叶反变换的verilog源码程序，512点，适用于Quartus2开发环境。-Inverse fast Fourier transform Verilog source programs, 512, for development environment Quartus2.
myosctest
- 用verilog写的MAX.II内部震荡时钟的使用测试程序-By verilog MAX.II internal shocks using the test procedures of the clock
mx2ufm
- altera公司MAX2器件的用户可用flash存储区测试程序-Altera MAX2 devices available to the user flash storage area test program
DE2_USB_API
- alteraDE2-70开发板自带USB实例的Veriloghdl源程序-AlteraDE2-70 development board comes with an instance of USB Veriloghdl source code
madadianji_controller
- 使用altera MAX II CPLD 做的马达步进电机控制器。-Motor stepper motor controller using the altera MAX II CPLD to do.
ATAIDE
- ATAIDE硬盘接口驱动程序，基于verilog的fpga实现-ATAIDE hard disk driver interface, based on verilog FPGA
fashengqi
- 通过读取rom的方式，调频调幅选择波形的信号发生器。已经调试过 verilong-based on rom to create a kind of generator which can change frequency, amptilude and waveform.
42VHDL-code
- 42个 VHDL实例 是学习VHDL的必备宝典 强烈推荐-42 VHDL example is the essential book for learning VHDL is strongly recommended
R232_total
- 用VHDL语言在FPGA上实现RS232的通信-RS232 communication is implemented on FPGA using VHDL language
SimpleFrequencyMeter
- 数字系统实验，简易频率计的设计。使用Quartus II 软件实现频率的测量 ，使用等精度法，误差控制在0.1 以内，测量范围1Hz到1MHz-Experimental digital systems, the design of simple frequency counter. Quartus II software frequency measurement, the use of precision method, the error is less than 0.1 , measuri
E01
- basys2开发板组合逻辑电路演示，输入为SW-0和SW-1,输出为LED0-LED5-basys2 development board combinational logic demo，there are two input,SW0 and SW1. output is LED0-LED5