资源列表
ethmac
- ethmac IP CORE VHDL IN QUARTUS-ethmac IP CORE VHDL IN QUARTUSII
i2c
- I2C IP CORE Verilog quartus-I2C IP CORE Verilog quartusii
spi
- SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
uart
- uart IP CORE Verilog quartus-uart IP CORE Verilog quartusii
wishbone
- wishbone IP CORE Verilog quartus-wishbone IP CORE Verilog quartusii
eBook.Verilog.VHDL.Golden.Reference.Guide
- VHDL programming PDF
HDB3ymq
- 通信原理课程设计 关于HDB3译码器的VHDL语言实现-use vhdl to transform HDB3
FIFO
- 这是用VHDL设计的一个8*9阵列的D触发器组成FIFO（first in first out）-This is a VHDL design using an 8* 9 array of D flip-flop composed of FIFO (first in first out)
57578855seg73
- 基于VHDL的数字技术器 完成各种的计数器的设计-Digital device
SOPC_System
- Altera SOPC系统设计入门教程，搭建简单的片上可编程系统-Tutorial Altera SOPC system design, building simple programmable system chip
cpld
- 学习cpld的入门讨论资料 对新手还是有帮助的-an entry material to learn CPLD,it s good to the beginner of CPLD
alu8bit
- alu 8 bit using vhdl is very useful