资源列表
Clock
- 用8个数码管实现数码管电子钟的c语言源程序-Achieved with 8 digital tube LED electronic clock c language source code
VHDL-node
- VHDL简单程序 包括简单的与门 非门 以及138 等 适合初学者使用-this is VHDL
pararel-8-bit-adder-verilog
- implementation of 8bit adder with pararel computation. It s use S/P converter and P/S converter. The code is written in verilog language
OutputCell
- verilog 实现的 jtag TAP ， 转自 opencore.com， 已通过验证
lcd1602_drive
- 用Verilog实现1602的配置及功能。正确编译与实现-Realized by Verilog 1602 configurations and functions. Compilation and implementation of the right
MotorV2
- 基于PID 控制算法的直流电机控制，输出PWM波，很容易用-motor control
lcd1602driver
- 基于FPGA的lcd1602驱动VHDL源代码-FPGA-based lcd1602 driver source code
iiccom
- I2C写操作，符合I2c的总协议，能够成功的写入数据到指定寄存器中-I2C write
vgasig
- 任天堂nes系统 vga显示部分 代码，希望大家用得着-Nintendo nes system vga display part of the code, I hope you need it
NIOS PWM inc
- NIOS环境PWM的USER LOGIC实例5-NIOS environment PWM USER Logic Case 5
s
- 基于VHDL的选择运算器，可以通过选择端选择加减与或四种运算，每个时钟周期刷新结果一次。注释已给出。-The choice of VHDL-based computing device, you can choose by selecting the side addition and subtraction with or four kinds of operations, the results of one per clock cycle refresh. Note has been gi
singnal
- VHDL实现通用通信信号源，包括sin，cos，方波，三角波，BPSK，GMSK，ASK，16QAM等信号的产生以及DDS，PLL的VHDL系统代码-VHDL implementation of universal communication sources, including sin, cos, square, triangle, BPSK, GMSK, ASK, 16QAM and other signal generation and DDS, PLL system, the VHDL