资源列表
18b20
- 18B20驱动，用51单片机控制，16位-18B20-driven, with 51 single-chip control, 16
3
- 秒表verilog 实现，顶层模块，译码模块，计数模块 -Stopwatch verilog implementation, top-level modules, decoding modules, counter modules
alu
- Verilog,PIC系列ALU设计，加法、减法、逻辑运算，二进制调整-Verilog,PIC ALU Design ADD SUB XOR AND
I2C
- CC2430处理器模拟I2C接口驱动程序,将此文件添加到CC2430的工程中就可以实现I2C接口的功能-CC2430 simulate the I2C interface
adder
- 此程序为用VERLOG HDL编写的一个完整的3位加法器。
vga
- This VHDL sample demonstrates how to generate a VGA signal to make it possible to connect an FPGA to a monitor. Written for Mimas v2, but probably easily adapted to any other board with a VGA connector on it (that can also be done by manually connect
clock1
- FPGA led时钟程序 分针时针-FPGA led clock program
步进电机控制器
- 采用VHDL编写的步进电机控制程序-stepping motor controlling program written by VHDL
timecontrol
- verilog 语言实现巴克码和写串行数据，对PLL进行配置。-using verilog to generate bakema and write series datas for PLL conifgure.
1
- 利用PCI9054桥芯片实现PCI与FPGA之间的连接，从而简化PCI总线控制，实现高速数据传输-To realize the connection between PCI and FPGA using the PCI9054 bridge chip, thus simplifying the PCI bus control, the realization of high speed data transmission
InternalProgramMemory
- vhdl code for InternalProgramMemory
adc16bit
- ADC — 16bit-adc 16bit