资源列表
ideacore1
- This is IDEA encryption Algorithm. Tested on Sparton 3 xilinx FPGA.
uart_transmitter
- This UART Transmitter interface C code Tested on Sparton 3 xilinx FPGA.-This is UART Transmitter interface C code Tested on Sparton 3 xilinx FPGA.
uart_receiver
- This UART Receiver interface C code Tested on Sparton 3 xilinx FPGA.-This is UART Receiver interface C code Tested on Sparton 3 xilinx FPGA.
kp_uart
- This UART and LCD interface C code Tested on Sparton 3 xilinx FPGA.-This is UART and LCD interface C code Tested on Sparton 3 xilinx FPGA.
kp_lcd
- This is Keypad and LCD interface C code Tested on Sparton 3 xilinx FPGA.
VHDLDouglasLPerry
- this VHDL Ebook for beginers-this is VHDL Ebook for beginers
VHDLVolneiAPedroni
- This book deals with the VHDL programming with synthesible examples...good for begineers
VHDLCookbook
- The purpose of this booklet is to give you a quick introduction to VHDL. This is done by informally describing the facilities provided by the language, and using examples to illustrate them. This booklet does not fully describe every aspect of
WallaceTreeMultiplier
- Wallace Tree Multiplier in VHDL for 4bit operation fully using structural language
wnl
- 自己的设计。虽然有不足请大家体谅。也请高手指点。-Their own design. Although there is insufficient understanding please. Expert advice please.
risc
- 用Verilog 编写的8位risc cpu，行为级描述，可综合-6 bits risc cpu by Verilog
lcd_timing_controller
- DE2-70 ltm timing Controller