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  1. sp6_BoardTest

    0下载:
  2. 针对xilinx spartan6芯片做的测试板测试用例-xilinx FPGA product SPARTAN6 test example
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-28
    • 文件大小:10.14mb
    • 提供者:刘用
  1. adc0809

    0下载:
  2. adc0809的时序控制,已经过modelsim验证,请大家多多指教,一起学习-adc0809 timing controll
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:1.97kb
    • 提供者:yangxiaotong
  1. nand_data

    0下载:
  2. this program is done in verilog hdl and it is program of AND gate DATA level modeling program-this program is done in verilog hdl and it is program of AND gate DATA level modeling program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-08
    • 文件大小:121.97kb
    • 提供者:hetang
  1. nand_gate

    0下载:
  2. this program is done in verilog hdl and it is program of NAND gate gate level modeling program-this program is done in verilog hdl and it is program of NAND gate gate level modeling program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:123.22kb
    • 提供者:hetang
  1. and_beh

    0下载:
  2. this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program-this program is done in verilog hdl and it is program of AND gate BEHVIORAL level modeling program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:97.66kb
    • 提供者:hetang
  1. and_data

    0下载:
  2. this program is done in verilog hdl and it is program of AND gate DATA level modeling program-this program is done in verilog hdl and it is program of AND gate DATA level modeling program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:119.69kb
    • 提供者:hetang
  1. and_gate

    0下载:
  2. this program is done in verilog hdl and it is program of AND gate gate level modeling program-this program is done in verilog hdl and it is program of AND gate gate level modeling program
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:137.04kb
    • 提供者:hetang
  1. ldpc576

    1下载:
  2. 基于wimax协议的低密度奇偶校验码LDPC的VERILOG实现,亲测可用。-WiMAX protocol based on the low density parity check code VERILOG LDPC implementation, pro test available.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2016-07-18
    • 文件大小:534kb
    • 提供者:kobe
  1. fifo

    0下载:
  2. 异步FIFO的verilog实现,可以参考一下-Verilog asynchronous FIFO implementation, you can refer to
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:49.63kb
    • 提供者:kobe
  1. mycfft

    0下载:
  2. LTE通信中的cfft算法的VERILOG实现,具有一定的参考意义。-LTE communication in the VERILOG algorithm CFFT implementation, with a certain reference value.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-11
    • 文件大小:1.99mb
    • 提供者:kobe
  1. dct

    0下载:
  2. LTE通信中DCT算法的VERILOG实现,给初学者提供参考。-LTE communication VERILOG algorithm DCT implementation, to provide a reference for beginners.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-04
    • 文件大小:29.41kb
    • 提供者:kobe
  1. ad7658

    0下载:
  2. AD7658 verilog源码,下载后可以直接使用-AD7658 verilog source code can be used directly after download
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:1.25kb
    • 提供者:熊熊
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