资源列表
08-1_VGA_Display_Test_640480
- 基于quartusII开发环境的VGA视频通信程序，很好的资料，欢迎下载-Based on quartusII development environment of VGA video communication program, very good information, welcome to download
xapp524
- xilinx FPGA 与高速ADC LVDS接口的范例程序-xilinx FPGA ADC LVDS interface
fenpin
- FPGA 控制步进电机 采用分频发设计控制端-Frequent FPGA to control stepping motor points
anjianjbujin
- Verilog 按键 步进电机 带有按键防抖-Verilog button strp motor
encoderdflow823.v
- An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.-An encoder is a device, circuit, transducer, softw
encoder823.v
- An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.-An encoder is a device, circuit, transducer, softw
decoderGATELEVEL3.v
- An encoder is a device, circuit, transducer, software program, algorithm or person that converts information one format or code to another, for the purposes of standardization, speed or compressions.-An encoder is a device, circuit, transducer, softw
24DECODERDATA.v
- In digital electronics, a binary decoder is a combinational logic circuit that converts a binary integer value to an associated pattern of output bits. They are used in a wide variety of applications, including data demultiplexing, seven segment disp
Buzzer-music
- 基于FPGA实现蜂鸣器播放音乐的功能 使用芯片为EP2C8Q208C8N,使用普通蜂鸣器，由于频率不同可实现放歌功能，本例设计的是《友谊地久天长》，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。-Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions ca
Digital-clock
- 基于FPGA实现数码管数字时钟功能 使用芯片为EP2C8Q208C8N,使用数码管显示数字时钟，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。-Based on FPGA digital tube digital clock function uses chip EP2C8Q208C8N, use digital display digital clock, using Verilog language programming, the present exam
FIR_filter
- 基于FPGA实现FIR滤波器功能 使用芯片为EP2C8Q208C8N,实现FIR滤波器的设计，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。-FIR filter function based on FPGA chip to use EP2C8Q208C8N, achieve FIR filter design using Verilog language programming, the present examples are engineering doc
8-way-responder
- 基于FPGA实现8路抢答器功能 使用芯片为EP2C8Q208C8N,实现40秒内8路抢答功能，八路键盘输入，使用Verilog语言编程，本例子有工程文件、仿真、波形，经过测试可以使用。-8 based on FPGA Responder feature uses chips EP2C8Q208C8N, 40 seconds to achieve 8 Responder features eight keyboard input, using Verilog language programm