资源列表
uart_receiver
- Very good info. for RS-232 receive VHDL code .
BIN_CV_MEN
- 可將2進位檔案 轉換成適合verilog應用的文字檔-2 into digital files can be converted to a text file for verilog applications
OpCtrl
- 步进电机的转动控制程序,可用于变速,和编码器混合使用-Stepper motor rotation control program can be used for variable speed, and mixed use encoder
UART
- the uart transmitter and receiver are used to design the data transmission for 8bit sipo and piso in verilog
VGA
- 用VERILOG语言编写的VGA时序控制程序,可实现对液晶显示器的控制-VGADRIVER
DDS_Set
- AD9852，DDS芯片接收数据逻辑。（Verilog语言）-AD9852, DDS chips receive data logic. (Verilog language)
new
- Please read your package and describe it at least 40 bytes in English. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
crc_peripheral32
- 附件是32位循环冗余校验码的硬件语言（v语言）实现。-Attached is a hardware language 32 cyclic redundancy check code (v language) implementation.
FIR_vhdl
- 基本FIR滤波器的VHDL源代码及其测试程序。-basic FIR filter VHDL source code and testing procedures.
65_conditioner
- 空调系统有限状态机的硬件描述 使用VHDL语言 注释详细 想要的赶紧下载吧-Air-conditioning systems of finite state machines using VHDL hardware descr iption language Notes detail you want to download
floating-point-multiplier
- verilog implementation of the floating point multiplier
flowadd
- verilog编写的32位浮点加法器-32-bit Floating Point Addition Written in Verilog