资源列表
DATAROM
- vhdl程序 vhdl程序 vhdl程序 vhdl程序 -vhdl procedure vhdl procedure vhdl procedure vhdl procedure vhdl procedure vhdl procedure vhdl procedure vhdl procedure
WRCTRL
- this VHDL Program get a 64 bit data and send it to a SDRAM-controller block to write into SDRAM and then get a 64bits data from SDR-block
autoshop
- 一个简单的自动售货机的程序，20种商品，2种价格。-A simple procedure for vending machines, 20 kinds of commodities, two kinds of prices.
sqrt
- This zip file contains the verilog source code for square root calculation and its test bench
BmpDecoder
- 适用于Altera FPGA Nios II平台uClinux OpenCV之BmpDecoder的源码-Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV
Lab03
- 基于verilog的quartus仿真流水灯编码译码传输控制-Quartus verilog simulation based on the water light transmission control codec
BARREL_SHIFTER
- IMPLEMENTATION OF 32 BIT BARREL SHIFTER IN VHDL
new-traffic-led-code
- 此代码为经过编译的智能交通灯程序，可以实现定周期控制，倒计时显示的功能！-This code is compiled intelligent traffic light program, you can achieve a given cycle control, countdown display function！
4
- VHDL 波形发生器VHDL程序与仿真-VHDL Waveform Generator and Simulation of VHDL procedures
ADS7825
- Core to read all channel from ADS7825 with external strobe
testtry
- sd_ram的时序控制程序，实现sd-ram的控制。-sd_ram timing control procedures to achieve sd-ram control.
drom
- FPGA rom硬件语言文件 用于输出正弦序列数字信号--- megafunction wizard: ROM: 1-PORT -- GENERATION: STANDARD -- VERSION: WM1.0 -- MODULE: altsyncram -- ============================================================ -- File Name: drom.vhd -- Megafunction Na