资源列表
gen_crc
- 任意位宽，任意多项式，并行CRC生成verilog代码脚本-CRC verilog gen scr ipt, for any width of data input
004-LED
- 单片机流水灯程序，外加数码管显示，灰常好的程序-Flowing water light microcontroller program, plus digital pipe display, grey ChangHaoDe program
AD7982
- 基于FPGA/CPLD的数据采集处理系统，应用芯片AD7982实现十八位高速数据采集，串行输出。基于VHDL语言的完整AD7982 的程序。-Based on FPGA/CPLD data acquisition and processing system, the application achieved eighteen chip AD7982 high-speed data acquisition, serial output. AD7982 is a complete VHDL lang
dpll
- dpll的verilog代码，完成数字锁相。用于时钟对准，位同步。-dpll the verilog code to complete the digital phase-locked. Alignment for the clock, bit synchronization.
lcd_B
- lcd module interfacing inintialization example
cordicshift
- COordinate Rotation DIgital Computer (CORDIC) based digital signal processing
LCD_HIENTHI_1KITU
- 1 character LCD display
even_divider_VHDL
- 常用2、4、6及任意偶数分频器的VHDL代码实现（原创）-used 2,4,6 and even arbitrary divider VHDL code to achieve (original)
TLC5510
- 采用超高速AD存储示波器程序设计。器件是采用TLC5510。用FPGA来控制实现。-The ultra high speed AD storage oscilloscope programming. Device is used TLC5510. Using FPGA to control the implementation.
hou
- 这是一个通信系统仿真随机过程的源程序，希望能对你有用 -hi，heihie
fir
- vhdl code for fir filter